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Chapter 1
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NAND Flash memory I/F: Supports 512Bytes and 2KBytes Page.
Interface: 8-bit NAND flash memory interface bus.
Hardware ECC generation, detection and indication (Software correction).
SFR I/F: Supports Little Endian Mode, Byte/half word/word access to Data and
ECC Data register, and Word access to other registers.
Steppingstone I/F: Supports Little/Big Endian, Byte/half word/word access.
The Steppingstone 4-KB internal SRAM buffer can be used for another purpose
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after NAND flash booting.
The write protect pin of the Flash device is routed to the hardware configuration
pin of the system connector FWP#. The device can be write protected at the base
board by connecting this pin to GND. At the module, a pull-up resistor is equipped.
Configuration pins - CPU module
There are eight configuration pins provided on the system connector. Four of them
are provided as hardware configuration pins, and the other four can be used as
software configuration pins. A 10k pull up resistor is provided on each signal line of
the configuration pins.
The following pins on the connector are defined as hardware configuration pins:
Signal
DEBUGEN#
FWP#
CONF2
CONF3
Description
Debug enable
Write protect of internal flash
Hardware configuration 2 (not yet used)
Hardware configuration 3 (not yet used)
The following port pins are defined as software configuration pins:
Signal
CONF4
CONF5
CONF6
CONF7
Port Pin
GPF2
GPF3
GPF4
GPF5
Description
Software configuration 0
Software configuration 1
Software configuration 2
Software configuration 3
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ConnectCore 9M 2443 & Wi-9M 2443 Hardware Reference
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